CDLC: Chaotic Dynamic-Diffusion Lightweight Cipher for Constrained IoT Edge Platforms

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CDLC: Chaotic Dynamic-Diffusion Lightweight Cipher for Constrained IoT Edge Platforms

Abstract:

Securing highly constrained Internet of Things (IoT) hardware requires cryptographic primitives that respect stringent memory budgets without sacrificing analytical security. Classical chaos based designs often fail under these conditions. Because they rely on continuous floating point mathematics, legacy schemes inevitably suffer from finite precision period collapse on simple microcontrollers. Their uncoupled substitution layers also remain highly vulnerable to differential cryptanalysis. We introduce the Chaos Driven Lightweight Cipher (CDLC) to resolve these specific physical and algorithmic limitations. Functioning na tively as an Authenticated Encryption with Associated Data (AEAD) framework, CDLC discards floating point dependencies entirely. The algorithm computes an asymmetric Addition Rotation XOR (ARX) dynamic permutation localized strictly over a finite integer r ing, ℤ232. This mathematical boundary completely eliminates the need for hardware intensive substitution boxes (S boxes). To guarantee trajectory isolation across sessions, the design enforces mandatory Nonce Key Dynamism during state initialization. The p ayload absorption phase utilizes a bidirectional, plaintext coupled feedback loop forcing the state to immediately satisfy the Strict Avalanche Criterion. Under standard Dolev Yao adversary parameters, CDLC achieves formalized IND CPA and INT CTXT bounds. Empirical cryptanalysis confirms optimal differential diffusion dynamics ( SAC=50.002%, NCCR=99.612%, UACI=33.467%) and consistent statistical uniformity against the NIST SP 800 22 diagnostic suite. Native compilation on diverse low power architectures 8 bi t AVR, 16 bit MSP430, and 32 bit ARM Cortex M4 yielded a static RAM footprint peaking at just 80 bytes. Flash utilization remains strictly bounded below 1,024 bytes. Execution guarantees constant time operations to resist timing leaks. Processing data at 1 81 cycles per byte on the Cortex M4, the cipher establishes a highly viable equilibrium between minimal resource allocation and high speed telemetry authentication.

Keywords: A uthenticated Encryption with Associated Data (AEAD) AEAD), Lightweight Cryptography , Discretized Chaotic Permutation , Addition Rotation XOR (ARX)

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